Īccording to JEDEC, : 111 1.575 volts should be considered the absolute maximum when memory stability is the foremost consideration, such as in servers or other mission-critical devices. Some manufacturers further propose using "dual-gate" transistors to reduce leakage of current. Successor Ĭompared to DDR2 memory, DDR3 memory uses less power. IDC stated in January 2009 that DDR3 sales would account for 29% of the total DRAM units sold in 2009, rising to 72% by 2011. ) The primary driving force behind the increased usage of DDR3 has been new Core i7 processors from Intel and Phenom II processors from AMD, both of which have internal memory controllers: the former requires DDR3, the latter recommends it. (The same timescale for market penetration had been stated by market intelligence company DRAMeXchange over a year earlier in April 2007, and by Desi Rhoden in 2005.
ĭDR3 was officially launched in 2007, but sales were not expected to overtake DDR2 until the end of 2009, or possibly early 2010, according to Intel strategist Carlos Weissenberg, speaking during the early part of their roll-out in August 2008. In May 2005, Desi Rhoden, chairman of the JEDEC committee, stated that DDR3 had been under development for "about 3 years". Samsung played a major role in the development and standardisation of DDR3. In February 2005, Samsung introduced the first prototype DDR3 memory chip. All AMD CPUs correctly support the full specification for 16 GB DDR3 DIMMs. Because of a hardware limitation not fixed until Ivy Bridge-E in 2013, most older Intel CPUs only support up to 4-Gbit chips for 8 GB DIMMs (Intel's Core 2 DDR3 chipsets only support up to 2 Gbit).
The DDR3 standard permits DRAM chip capacities of up to 8 gigabits (Gbit), and up to four ranks of 64 bits each for a total maximum of 16 gigabytes (GB) per DDR3 DIMM. The primary benefit of DDR3 SDRAM over its immediate predecessor, DDR2 SDRAM, is its ability to transfer data at twice the rate (eight times the speed of its internal memory arrays), enabling higher bandwidth or peak data rates. The actual DRAM arrays that store the data are similar to earlier types, with similar performance. DDR3 SDRAM is neither forward nor backward compatible with any earlier type of random-access memory (RAM) because of different signaling voltages, timings, and other factors.ĭDR3 is a DRAM interface specification. It is the higher-speed successor to DDR and DDR2 and predecessor to DDR4 synchronous dynamic random-access memory (SDRAM) chips. Double Data Rate 3 Synchronous Dynamic Random-Access Memory ( DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth (" double data rate") interface, and has been in use since 2007.
0 kommentar(er)
